1
Timing

Cover is for reference only
Main Authors: Sapatnekar Sachin S 1967-
Published: Kluwer Academic Publishers,
Publication Dates: c2004.
Call Number: TN470.2/S241
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2
Electromigration Inside Logic Cells : Modeling, Analyzing and Mitigating Signal Electromigration in NanoCMOS /

Cover is for reference only
Main Authors: Posser, Gracieli (Author)
Corporate Authors: SpringerLink (Online service)
Group Author: Sapatnekar, Sachin S; Reis, Ricardo
Published: Springer International Publishing : Imprint: Springer,
Publication Dates: 2017.
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3
Layout optimizations in VLSI design

Cover is for reference only
Group Author: Lu Bing; Du Dingzhu; Sapatnekar Sachin S 1967-
Published: Kluwer Academic Publishers,
Publication Dates: c2001.
Call Number: TN47/L428
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4
Timing analysis and optimization of sequential circuits

Cover is for reference only
Main Authors: Maheshwari Naresh 1970-
Group Author: Sapatnekar Sachin S 1967-
Published: Kluwer Academic,
Publication Dates: c1999.
Call Number: TN470.2-37/M214/
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5
Handbook of algorithms for physical design automation

Cover is for reference only
Group Author: Alpert Charles J; Mehta Dinesh P; Sapatnekar Sachin S 1967-
Published: CRC Press,
Publication Dates: c2009.
Call Number: TN40-62/H236-1
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6
Design automation for timing-driven layout synthesis

Cover is for reference only
Main Authors: Sapatnekar Sachin S 1967-
Group Author: Kang Sung-Mo 1945-
Published: Kluwer Academic Publishers,
Publication Dates: c1993.
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