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Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects /

This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the c...

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Bibliographic Details
Main Authors: Louren o, Nuno
Corporate Authors: SpringerLink Online service
Group Author: Martins, Ricardo; Horta, Nuno
Published: Springer International Publishing : Imprint: Springer,
Publisher Address: Cham :
Publication Dates: 2017.
Literature type: eBook
Language: English
Subjects:
Engineering
Microprocessors
Electronics
Microelectronics
Electronic circuits
Circuits and Systems
Processor Architectures
Electronics and Microelectronics, Instrumentation
Online Access: http://dx.doi.org/10.1007/978-3-319-42037-0
Summary: This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, includin
Carrier Form: 1 online resource(xxvii,182pages): illustrations
ISBN: 9783319420370
Index Number: TK7888
CLC: TN01
Contents: Introduction -- Previous Works on Automatic Analog IC Sizing -- AIDA-C Architecture -- Multi-Objective Optimization Kernel -- AIDA-C Circuit Sizing Results -- Layout-Aware Circuit Sizing -- AIDA-C Layout-aware Circuit Sizing Results -- Conclusions.

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