Screen LibraryThe gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits：the semi-empirical and compact model approaches
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| Main Authors: | |
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| Corporate Authors: | |
| Published: |
Springer,
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| Publisher Address: | Dordrecht New York |
| Publication Dates: | c2010. |
| Literature type: | Book |
| Language: | English |
| Series: |
Analog circuits and signal processing |
| Subjects: | |
| Online Access: |
http://dx.doi.org/10.1007/978-0-387-47101-3 |
| Carrier Form: | 1 online resource (xvi, 171 p.): ill. |
| ISBN: |
9780387471013 (e-isbn) 0387471014 (e-isbn) |
| Index Number: | TN470 |
| CLC: | TN470.2 |
| Contents: |
In title "gm/ID" both the m and D are subscript. Includes bibliographical references (p. 167-168) and index. |