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Networks on chips : technology and tools /

The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and sto...

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Bibliographic Details
Main Authors: Benini, Luca, 1967
Corporate Authors: Elsevier Science & Technology
Group Author: De Micheli, Giovanni
Published: Elsevier Morgan Kaufmann Publishers,
Publisher Address: Amsterdam ; Boston :
Publication Dates: 2006.
Literature type: eBook
Language: English
Series: The Morgan Kaufmann series in systems on silicon
Subjects:
Systems on a chip
Computer networks > Equipment and supplies
Networks on a chip > Congresses
Syste mes sur une puce
Re seaux d'ordinateurs > Appareils et mate riel
TECHNOLOGY & ENGINEERING > Electronics > Circuits > Integrated
TECHNOLOGY & ENGINEERING > Electronics > Circuits > General
Computer networks / Equipment and supplies
Networks on a chip / Congresses
Electronic books
Online Access: http://www.sciencedirect.com/science/book/9780123705211
Summary: The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete cl
Carrier Form: 1 online resource (x, 395 pages) : illustrations.
Bibliography: Includes bibliographical references and index.
ISBN: 9780123705211
0123705215
9780080473567
0080473563
Index Number: TK7895
CLC: TP302.1
Contents: Networks on chip -- Network architecture : principles and examples -- Physical network layer -- The data-link layer in NoC design -- Network and transport layers in networks on chip -- Network interface architecture and design issues -- NoC programming -- Design methodologies and CAD tool flows for NoCs -- Designs and implementations of NoC-based SoCs.

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