System Reduction for Nanoscale IC Design /

This book describes the computational challenges posed by the progression toward nanoscale electronic devices and increasingly short design cycles in the microelectronics industry, and proposes methods of model reduction which facilitate circuit and device simulation for specific tasks in the design...

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Bibliographic Details
Corporate Authors: SpringerLink (Online service)
Group Author: Benner, Peter (Editor)
Published: Springer International Publishing : Imprint: Springer,
Publisher Address: Cham :
Publication Dates: 2017.
Literature type: eBook
Language: English
Series: Mathematics in Industry, 20
Subjects:
Online Access: http://dx.doi.org/10.1007/978-3-319-07236-4
Summary: This book describes the computational challenges posed by the progression toward nanoscale electronic devices and increasingly short design cycles in the microelectronics industry, and proposes methods of model reduction which facilitate circuit and device simulation for specific tasks in the design cycle. The goal is to develop and compare methods for system reduction in the design of high dimensional nanoelectronic ICs, and to test these methods in the practice of semiconductor development. Six chapters describe the challenges for numerical simulation of nanoelectronic circuits and suggest model reduction methods for constituting equations. These include linear and nonlinear differential equations tailored to circuit equations and drift diffusion equations for semiconductor devices. The performance of these methods is illustrated with numerical experiments using real-world data. Readers will benefit from an up-to-date overview of the latest model reduction methods in computational nanoelectronics.
Carrier Form: 1 online resource (XI, 197 pages) : illustrations.
ISBN: 9783319072364
Index Number: QA71
CLC: TP3
Contents: Preface -- 1 Model order reduction of integrated circuits in electrical networks: Michael Hinze, Martin Kunkel, Ulrich Matthes, and Morten Vierling -- 2 Element-based model reduction in circuit simulation: Andreas Steinbrecher and Tatjana Stykel -- 3 Reduced Representation of Power Grid Models: Peter Benner and Andr Schneider -- 4 Coupling of numeric/symbolic reduction methods for generating parametrized models of nanoelectronic systems: Oliver Schmidt, Matthias Hauser, and Patrick Lang -- 5 Low-Rank Cholesky Factor Krylov Subspace Methods for Generalized Projected Lyapunov Equations: Matthias Bollh fer and Andr K. Eppler -- Index.