Design and test strategies for 2D/3D integration for NoC-based multicore architectures /
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Main Authors: | |
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Group Author: | |
Published: |
Springer,
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Publisher Address: | Cham : |
Publication Dates: | [2020] |
Literature type: | Book |
Language: | English |
Subjects: | |
Carrier Form: | xii, 162 pages : illustrations (some color), forms ; 24 cm |
Bibliography: | Includes bibliographical references and index. |
ISBN: |
9783030313098 (hardback) : 3030313093 (hardback) |
Index Number: | TK5105 |
CLC: | TN43 |
Call Number: | TN43/M282 |
Contents: | Intro -- Preface -- Contents -- 1 Introduction -- 1 System-on-Chip to Network-on-Chip: A Paradigm Shift -- 2 NoC-Based Multi-Core Systems with Three-Dimensional (3D) Integration Technology -- 3 Power and Temperature Issues in NoC-Based Multi-CoreSystems -- 4 Testing of NoC-Based Multi-Core Systems -- 5 Issues in Multi-Core Systems Design with Integrated NoC and 3D Technologies -- 6 Application Mapping and TSV Placement: A CombinedApproach -- 7 Swarm Based Optimizer -- 8 Scope and Motivation of the Works -- 9 Summary of This Book -- 10 Conclusion -- References -- 2 Alternative Approaches |