Screen LibraryDigital electronics 2 : sequential and arithmetic logic circuits /
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| Main Authors: | |
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| Corporate Authors: | |
| Published: |
ISTE, Ltd. ; Wiley,
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| Publisher Address: | London : Hoboken, NJ : |
| Publication Dates: | 2016. |
| Literature type: | eBook |
| Language: | English |
| Subjects: | |
| Online Access: |
http://onlinelibrary.wiley.com/book/10.1002/9781119329756 |
| Item Description: | 7.3.2. Two-bit adder. |
| Carrier Form: | 1 online resource (333 pages) |
| Bibliography: | Includes bibliographical references and index. |
| ISBN: |
9781119329756 1119329752 9781119329763 1119329760 |
| Index Number: | TK7868 |
| CLC: | TN431.2 |
| Contents: |
Cover ; Title Page; Copyright ; Contents; Preface; P.1. Summary; P.2. The reader; 1. Latch and Flip-Flop; 1.1. Introduction; 1.2. General overview; 1.2.1. SR latch; 1.2.2. \bar{S} \bar{R} latch; 1.2.3. Application: switch debouncing; 1.3. Gated SR latch; 1.3.1. Implementation based on an SR latch; 1.3.2. Implementation based on an \bar{S} \bar{R} latch; 1.4. Gated D latch; 1.5. Basic JK flip-flop; 1.6. T flip-flop; 1.7. Master-slave and edge-triggered flip-flop; 1.7.1. Master-slave flip-flop; 1.7.2. Edge-triggered flip-flop; 1.8. Flip-flops with asynchronous inputs. 1.9. Operational characteristics of flip-flops1.10. Exercises; 1.11. Solutions; 2. Binary Counters; 2.1. Introduction; 2.2. Modulo 4 counter; 2.3. Modulo 8 counter; 2.4. Modulo 16 counter; 2.4.1. Modulo 10 counter; 2.5. Counter with parallel load; 2.6. Down counter; 2.7. Synchronous reversible counter; 2.8. Decoding a down counter; 2.9. Exercises; 2.10. Solutions; 3. Shift Register; 3.1. Introduction; 3.2. Serial-in shift register; 3.3. Parallel-in shift register; 3.4. Bidirectional shift register; 3.5. Register file; 3.6. Shift register based counter; 3.6.1. Ring counter. 3.6.2. Johnson counter3.6.3. Linear feedback counter; 3.7. Exercises; 3.8. Solutions; 4. Arithmetic and Logic Circuits; 4.1. Introduction; 4.2. Adder; 4.2.1. Half adder; 4.2.2. Full adder; 4.2.3. Ripple-carry adder; 4.2.4. Carry-lookahead adder; 4.2.5. Carry-select adder; 4.2.6. Carry-skip adder; 4.3. Comparator; 4.4. Arithmetic and logic unit; 4.5. Multiplier; 4.5.1. Multiplier of 2-bit unsigned numbers; 4.5.2. Multiplier of 4-bit unsigned numbers; 4.5.3. Multiplier for signed numbers; 4.6. Divider; 4.7. Exercises; 4.8. Solutions; 5. Digital Integrated Circuit Technology; 5.1. Introduction. 5.2. Characteristics of the technologies5.2.1. Supply voltage; 5.2.2. Logic levels; 5.2.3. Immunity to noise; 5.2.4. Propagation delay; 5.2.5. Electric power consumption; 5.2.6. Fan-out or load factor; 5.3. TTL logic family; 5.3.1. Bipolar junction transistor; 5.3.2. TTL NAND gate; 5.3.3. Integrated TTL circuit; 5.4. CMOS logic family; 5.4.1. MOSFET transistor; 5.4.2. CMOS logic gates; 5.5. Open drain logic gates; 5.5.1. Three-state buffer; 5.5.2. CMOS integrated circuit; 5.6. Other logic families; 5.7. Interfacing circuits of different technologies; 5.8. Exercises; 5.9. Solutions. 6. Semiconductor Memory6.1. Introduction; 6.2. Memory organization; 6.3. Operation of a memory; 6.4. Types of memory; 6.4.1. Non-volatile memory; 6.4.2. Volatile memories; 6.4.3. Characteristics of the different memory types; 6.5. Applications; 6.5.1. Memory organization; 6.5.2. Applications; 6.6. Other types of memory; 6.6.1. Ferromagnetic RAM; 6.6.2. Content-addressable memory; 6.6.3. Sequential access memory; 6.7. Exercises; 6.8. Solutions; 7. Programmable Logic Circuits; 7.1. General overview; 7.2. Programmable logic device; 7.3. Applications; 7.3.1. Implementation of logic functions. |