Device modeling for analog and RF CMOS circuit design
Saved in:
Main Authors: | |
---|---|
Corporate Authors: | |
Group Author: | ; |
Published: |
|
Literature type: | Electronic eBook |
Language: | English |
Subjects: | |
Online Access: |
http://onlinelibrary.wiley.com/book/10.1002/0470863803 |
Carrier Form: | 1 online resource (xiii, 292 pages) : illustrations |
Bibliography: | Includes bibliographical references and index. |
ISBN: |
0471498696 9780471498698 0470863803 9780470863800 0470864346 9780470864340 |
Index Number: | TK7871 |
CLC: | TN432.02 |
Contents: | Cover Contents Preface 1 MOSFET Device Physics and Operation 1.1 Introduction 1.2 The MOS Capacitor 1.2.1 Interface Charge 1.2.2 Threshold Voltage 1.2.3 MOS Capacitance 1.2.4 MOS Charge Control Model 1.3 Basic MOSFET Operation 1.4 Basic MOSFET Modeling 1.4.1 Simple Charge Control Model 1.4.2 The Meyer Model 1.4.3 Velocity Saturation Model 1.4.4 Capacitance Models 1.4.5 Comparison of Basic MOSFET Models 1.4.6 Basic Small-signal Model 1.5 Advanced MOSFET Modeling 1.5.1 Modeling Approach 1.5.2 Nonideal Effects 1.5.3 Unified MOSFET CV Model References 2 MOSFET Fabrication 2.1 Introduction 2.2 Typical Planar Digital CMOS Process Flow 2.3 RF CMOS Technology References 3 RF Modeling 3.1 Introduction 3.2 Equivalent Circuit Representation of MOS Transistors 3.3 High-frequency Behavior of MOS Transistors and AC Small-signal Modeling 3.3.1 Requirements for MOSFET Modeling for RF Applications 3.3.2 Modeling of the Intrinsic Components 3.3.3 HF Behavior and Modeling of the Extrinsic Components 3.3.4 Non-quasi-static Behavior 3.4 Model Parameter Extraction 3.4.1 RF Measurement and De-embedding Techniques 3.4.2 Parameter Extraction 3.5 NQS Model for RF Applications References 4 Noise Modeling 4.1 Noise Sources in a MOSFET 4.2 Flicker Noise Modeling 4.2.1 The Physical Mechanisms of Flicker Noise 4.2.2 Flicker Noise Models 4.2.3 Future Work in Flicker Noise Modeling 4.3 Thermal Noise Modeling 4.3.1 Existing Thermal Noise Models 4.3.2 HF Noise Parameters 4.3.3 Analytical Calculation of the Noise Parameters 4.3.4 Simulation and Discussions 4.3.5 Induced Gate Noise Issue References 5 Proper Modeling for Accurate Distortion Analysis 5.1 Introduction 5.2 Basic Terminology 5.3 Nonlinearities in CMOS Devices and Their Modeling 5.4 Calculation of Distortion in Analog CMOS Circuits References 6 The BSIM4 MOSFET Model 6.1 An Introduction to BSIM4 6.2 Gate Dielectric Model 6.3 Enhanced Models for Effective DC and AC Channel Length and Width 6.4 Threshold Voltage Model 6.4.1 Enhanced Model for Nonuniform Lateral Doping due to Pocket (Halo) Implant 6.4.2 Improved Models for Short-channel Effects 6.4.3 Model for Narrow Width Effects 6.4.4 Complete Threshold Voltage Model in BSIM4 6.5 Channel Charge Model 6.6 Mobility Model 6.7 Source/Drain Resistance Model 6.8 IV Model 6.8.1 IV Model When rdsMod = 0 (R(DS)(V) 0) 6.8.2 IV Model When rdsMod = 1 (R(DS)(V) = 0) 6.9 Gate Tunneling Current Model 6.9.1 Gate-to-substrate Tunneling Current I(GB) 6.9.2 Gate-to-channel and Gate-to-S/D Currents 6.10 Substrate Current Models 6.10.1 Model for Substrate Current due to Impact Ionization of Channel Current 6.10.2 Models for Gate-induced Drain Leakage (GIDL) and Gate-induced Source Leakage (GISL) Currents 6.11 Capacitance Models 6.11.1 Intrinsic Capacitance Models 6.11.2 Fringing/Overlap Capacitance Models 6.12 High-speed (Non-quasi-static) Model 6.12.1 The Transient NQS Model 6.12.2 The AC NQS Model 6.13 RF Model 6.13.1 Gate Electrode and Intrinsic-input Resistance (IIR) Model 6.13.2 Substrate Resistance Network 6.14 Noise Model 6.14.1 Flicker Noise Models 6.14.2 Channel Thermal Noise Model 6.14.3 Other Noise Models 6.15 Junction Diode Models 6.15.1 Junction Diode IV Model 6.15.2 Junction Diode Capacitance Model 6.16 Layout-dependent Parasitics Model 6.16.1 Effective Junction Perimeter and Area 6.16.2 Source/drain Diffusion Resistance Calculation References 7 The EKV Model 7.1 Introduction 7.2 Model Features 7.3 Long-channel Drain Current Model 7.4 Modeling Second-order Effects of the Drain Current 7.4.1 Velocity Saturation and Channel-length Modulation 7.4.2 Mobility Degradation due to Vertical Electric Field 7.4.3 Effects of Charge-sharing 7.4.4 Reverse Short-channel Effect (RSCE) 7.5 SPICE Example: The Effect of Charge-sharing 7.6 Modeling of Charge Storage Effects 7.7 Non-quasi-static Modeling 7.8 The Noise Mo. |